Apple
Design Verification Engineer
$135K–$250K
Cary, North Carolina +2 · Full-time · Posted Oct 30, 2026
- Location
- Cary, North Carolina
Melbourne, Florida
Waltham, Massachusetts - Experience
- Minimum 3 years of relevant industry experience, or equivalent.
- Education
- BS degree in technical subject area; equivalent experience accepted. MS degree preferred.
About the job
Performs pre-silicon verification for SoC/IP designs to support functional first silicon, from test planning and environment development through debug, coverage, and sign-off.
What you'll do
- Develop verification plans and SystemVerilog/UVM infrastructure, including stimulus, checkers, assertions, and coverage.
- Run and debug regressions, resolve bugs, and track verification progress and coverage.
- Use LLMs and related technologies to improve verification efficiency and quality.
What they ask for
- BS degree in a technical subject area and at least 3 years of relevant industry experience, or equivalent.
- Strong knowledge of OOP, SystemVerilog, and UVM.
- Strong knowledge of developing scalable and portable testbenches.
- Experience with verification methodologies and tools, including simulators, waveform viewers, automation, coverage collection, and gate-level simulations.
Nice to have
- MS degree in a technical subject area and relevant industry experience; working experience using LLMs for efficiency and quality.
- Experience with UPF or similar methodology, scripting languages, serial or parallel protocols, or formal verification.
Pay
$134,700 and $249,500 (base salary range)
Tools
SystemVerilog, UVM, LLMs, UPF, Python, Perl, TCL, PCIe
AI focus
Use LLMs and related technologies to make verification more efficient and improve quality.
Model-written summary · the original posting is authoritative