Apple
Emulation Verification Engineer
$185K–$325K
Cupertino, California +1 · Full-time · Posted Apr 9, 2026
- Location
- Cupertino, California
Sunnyvale, California - Experience
- Minimum of 10 years of relevant industry experience.
- Education
- BS
About the job
Verifies large SoCs by bringing designs up on emulation platforms, developing emulation test environments, and executing functional and low-power testing.
What you'll do
- Bring up large SoCs on emulation platforms and collaborate with cross-functional teams.
- Develop and apply synthesizable monitors, checkers, stimulus, and verification code; reuse UVM constraints to build random stimulus infrastructure.
- Prepare and execute emulation test plans, including low-power testing, and review plans with teams.
What they ask for
- BS degree.
- 10 years of relevant industry experience.
- Proven design verification skills.
- Experience writing synthesizable SystemVerilog/Verilog code and SystemVerilog assertions.
Nice to have
- Understanding of RTL-to-emulation tool flow and experience with standard emulator or FPGA flows.
- Experience with SystemVerilog verification environments, C/C++ DPI, UVM, test firmware, scripting, or UVM Acceleration.
Pay
$184,700 and $324,800 (base salary)
Tools
Palladium, Verilog, System Verilog, SystemVerilog, UVM, C/C++ DPI, Perl, Python
Model-written summary · the original posting is authoritative