Apple
GPU Top RTL Designer
Austin, Texas · Full-time · Posted Mar 16, 2026
- Education
- BS in EE, CE, or ECE required.
About the job
Design and integrate RTL and specifications for mobile GPU power management and SoC interface logic, delivering designs that meet performance, power, area, timing, and functional goals.
What you'll do
- Deliver RTL and other design collateral to Physical Design teams; optimize RTL and constraints to close timing, power, area, and lint.
- Assess and integrate IP from other Apple teams for security, debug, and power management solutions.
- Coordinate with cross-functional and multi-site teams, including providing schedules to IP teams and management.
What they ask for
- BS in EE, CE, or ECE.
- Experience in at least one of: logic optimization, synthesis, timing analysis, floor-planning, power intent descriptions, or clock domain clock crossings.
- Experience writing RTL in Verilog and/or System Verilog.
- Experience with logic simulation and debug.
Nice to have
- Ability to write one or more scripting languages.
- Experience in graphics hardware design or power management for large designs such as CPUs, GPUs, or SoCs.
Tools
RTL, Verilog, System Verilog
Model-written summary · the original posting is authoritative