Apple
Graphics Cache Hierarchy Design Verification Engineer
$150K–$278K
Santa Clara, California · Full-time · Posted Jul 27, 2026
- Experience
- Minimum of 2 years of experience; CPU or GPU architecture experience required.
- Education
- BS
About the job
Performs pre-silicon RTL verification of GPU graphics memory subsystem units, including caches, memory management, interconnects, and link interfaces.
What you'll do
- Develop verification plans, test benches, tests, and automated verification flows.
- Run simulations, debug design and environment issues, and analyze functional coverage to close gaps.
- Coordinate verification with design, architecture, memory subsystem, and core-level engineers.
What they ask for
- Experience in CPU or GPU architecture.
- Experience developing unit- or cluster-level test environments and bringing up/debugging complex designs.
- Experience with verification languages such as SystemVerilog and with HDL simulators and waveform viewers.
- BS + minimum of 2 years of experience.
Nice to have
- Cache verification, memory subsystem testing, graphics pipeline knowledge, or unit-level test planning and coverage closure.
- UVM; Perl, Ruby, Shell scripting, or Makefiles; strong software and programming skills.
Pay
USD $150,400–$277,600 base salary
Tools
VHDL, Verilog, SystemVerilog, UVM, Perl, Ruby, Shell, Makefiles
Model-written summary · the original posting is authoritative