Drimva

Apple

Graphics Design Verification Engineer

Austin, Texas · Full-time · Posted Feb 17, 2026

Experience
10 years of relevant experience.
Education
BS

About the job

Leads pre-silicon RTL verification of GPU logic blocks, developing test plans and test benches, tracking coverage, and debugging simulation and silicon failures.

What you'll do

  • Lead verification teams and own test plans, stimulus, coverage, and regression strategy.
  • Architect, build, and maintain test benches and BFMs using UVM and SystemVerilog.
  • Debug GPU failures and coordinate verification work with design, micro-architecture, and other teams; report weekly status.

What they ask for

  • BS and 10 years of relevant experience.
  • Background in CPU or GPU architectures.
  • Experience with Verilog or other HDLs, and architecting test benches with SystemVerilog and UVM/OVM.
  • Experience with constrained random verification, functional and code coverage, assertion methodology, and debugging complex design and environmental issues.

Nice to have

  • Expertise in GPU architectures.
  • Experience with HDL simulators and waveform viewers such as IES, VCS, DVE, or Verdi; or Perl, Shell scripting, Makefiles, or TCL.

Tools

RTL, Verilog, SystemVerilog, UVM, OVM, IES, VCS, DVE

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)