Apple
IC Packaging Integration Engineer
$185K–$325K
San Francisco Bay Area, California · Full-time · Posted Jul 24, 2026
- Experience
- 10+ years of relevant industry experience; preferred alternative: 6+ years with an MS/PhD.
- Education
- BS; preferred MS/PhD.
About the job
Lead integrated semiconductor package design and technology development from concept through qualification and high-volume production.
What you'll do
- Lead package co-design with silicon, packaging, and systems teams to meet electrical, mechanical, thermal, reliability, and fit requirements.
- Drive package technology development and work with assembly partners from development and NPI through qualification and high-volume production.
- Create package design documentation, design rules, technical risk assessments, and checklists for development and production release.
What they ask for
- BS and 10+ years of relevant industry experience.
- Experience in Semiconductor Packaging Design, Process & Technology Development.
- Understanding of cross-functional packaging areas, including package layout and architecture, thermal and mechanical design, SI/PI, reliability, testing, and failure analysis.
- Strong problem-solving skills, communication skills, and ability to work independently.
Nice to have
- MS/PhD and 6+ years of relevant industry experience.
- Advanced SiP packaging background; experience with Cadence APD/Allegro is desirable.
Pay
$184,700 and $324,800 USD base salary
Tools
Cadence APD/Allegro, SI/PI, SiP, NPI, OSAT
Model-written summary · the original posting is authoritative