Apple
MAC Design Verification Engineer
$123K–$225K
San Diego, California +1 · Full-time · Posted Oct 27, 2026
- Location
- San Diego, California
Sunnyvale, California - Experience
- 3+ years preferred; no minimum years specified.
- Education
- Bachelor’s degree.
About the job
Verifies wireless MAC RTL and its interfaces before silicon fabrication, developing reusable testbenches and coverage-driven tests to ensure design quality.
What you'll do
- Create verification plans, reusable testbenches, UVM libraries, and coverage models for MAC blocks and subsystems.
- Develop and run directed and constrained-random tests; debug failures, track bugs, and drive issue closure with designers.
- Use AI and machine learning to identify design and testbench issues, and support validation with Palladium and/or FPGA.
What they ask for
- Bachelor’s degree.
- Advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertion.
- Knowledge and experience with ASIC verification flows, including testbench development, constrained-random testing, and code/functional coverage.
- Verification experience with at least one of: MAC, PHY, DMA, timer, AMBA bus and fabric, or encryption/decryption engine.
Nice to have
- 3+ years of wireless/wired communication block or subsystem verification experience; knowledge of Bluetooth, UWB, WLAN, or Zigbee protocols.
- Proficiency in shell and Python scripting, Perl scripting; experience using AI technologies in data mining/analysis or Palladium/FPGA validation.
Pay
$122,700 and $214,300 (base pay range); $129,300 and $225,300 (base pay range)
Tools
Verilog, SystemVerilog, UVM, SystemVerilog Assertion, Palladium, FPGA, Python, Perl
AI focus
Use machine learning and AI technologies to identify design and testbench issues and ensure design verification quality.
Model-written summary · the original posting is authoritative