Drimva

Apple

Mixed-Signal Behavioral Modeling Engineer

Beaverton, Oregon · Full-time · Posted Nov 10, 2025

Experience
Minimum 10 years of relevant experience.
Education
BS degree in technical discipline.

About the job

Develops SystemVerilog behavioral models of custom mixed-signal circuits for system-level verification, collaborating with circuit design and verification teams.

What you'll do

  • Write functional circuit models that incorporate non-idealities and verification hooks.
  • Analyze circuit-team data in Python/MATLAB, profile models, and run simulations and formal equivalence tools.
  • Improve modeling methods, functional coverage, modeling flows, and tools for identifying circuit issues.

What they ask for

  • BS degree in a technical discipline.
  • Minimum 10 years of relevant experience.

Nice to have

  • Knowledge of SystemVerilog behavioral coding, digital logic, clocking, and simulation.
  • Experience with mixed-signal blocks, SPICE/co-simulation, and scripting in PERL/Python.

Tools

SystemVerilog, Python, MATLAB, PERL, SPICE

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)