Apple
Mixed Signal RTL Design Engineer
$185K–$325K
Cupertino, California +1 · Full-time · Posted Jul 7, 2026
- Location
- Cupertino, California
Sunnyvale, California - Experience
- 10+ years of relevant experience preferred.
- Education
- Bachelor's of Science in Electric Engineering.
About the job
Design and code RTL for advanced mixed-signal circuits, support verification and physical-design timing closure, and help bring up silicon.
What you'll do
- Write RTL and detailed design specifications for mixed-signal circuit blocks.
- Support design verification and use formal checks to ensure RTL quality.
- Collaborate with physical-design teams on timing closure and support silicon bring-up.
What they ask for
- Bachelor's of Science in Electric Engineering.
- Deep knowledge of RTL design.
- Deep knowledge of Verilog and System Verilog.
- Good knowledge of mixed-signal concepts.
Nice to have
- Good knowledge of algorithm development and experience working with physical-design teams.
- Knowledge of front-end tools, synthesis, static timing, DFT, System-Verilog assertions, verification techniques, and scripting languages; Perl and Python are plusses.
Pay
$184,700 to $324,800 USD base salary
Tools
RTL, Verilog, System Verilog, LINT, CDC, RDC, Perl, Python
Model-written summary · the original posting is authoritative