Apple
Physical Synthesis CAD Engineer
$216K–$325K
Santa Clara, California · Full-time · Posted Apr 17, 2026
- Experience
- BS + 3 years of relevant industry experience.
- Education
- BS
About the job
Develop and validate physical synthesis methods, tools, and implementation flows to improve Apple Silicon processor performance, power, and area.
What you'll do
- Develop and validate physical synthesis techniques through implementation flows, including place-and-route, timing signoff, and power analysis.
- Optimize RTL and create custom tools and ML-based methodologies to improve PPA.
- Partner with design teams and EDA vendors to develop and deploy methodologies across Apple Silicon projects.
What they ask for
- Experience with TCL, Python, or Perl scripting languages.
- Experience with industry-standard synthesis tools such as Fusion Compiler or Genus.
- Experience working with CAD tools and flows.
- BS plus 3 years of relevant industry experience.
Nice to have
- Experience in CAD flow or FE methodology development.
- Experience with UPF low-power flows, logical equivalence tools, linting, static timing analysis, low-power checks, or place-and-route tools.
Pay
$216,200 to $324,800 USD base salary
Tools
TCL, Python, Perl, Fusion Compiler, Genus, UPF, Conformal LEC, Formality
AI focus
Create custom tools and ML-based methodologies for challenging high-performance, low-power design problems.
Model-written summary · the original posting is authoritative