Apple
PLL Design Engineer
Austin, Texas · Full-time · Posted Apr 20, 2026
- Experience
- 0 years of relevant experience required.
- Education
- BSEE
About the job
Develop frequency synthesizers for Compute, SoC, SerDes, and Cellular applications within Apple’s Analog-Mixed/Signal group.
What you'll do
- Develop frequency synthesizers for a range of applications.
- Contribute to the design of innovative hard IPs for SOC/PHY designs.
What they ask for
- BSEE
Nice to have
- PLL/FLL and frequency synthesis architecture and circuit design expertise, including digital and analog approaches, DCO/VCO design, Fractional-N, SSC, and spur and jitter cancellation.
- Knowledge of clocking fundamentals, phase noise, jitter analysis, budgeting, and feedback loop dynamics.
Tools
System Verilog, RTL
Model-written summary · the original posting is authoritative