Drimva

Apple

PLL Design Engineer

Austin, Texas · Full-time · Posted Dec 15, 2025

Experience
At least 10 years of relevant experience.
Education
BSEE

About the job

Develop frequency synthesizers for Compute, SoC, SerDes, and Cellular applications within Apple’s Analog-Mixed/Signal group.

What you'll do

  • Develop frequency synthesizers for a range of applications.
  • Design PLL/FLL and frequency-synthesis architectures and circuits.
  • Model and simulate architectures to assess performance and loop dynamics.

What they ask for

  • BSEE
  • At least 10 years of relevant experience

Nice to have

  • Proficiency in PLL/FLL and frequency-synthesis architecture and circuit design, including DCO/VCO, Fractional-N, SSC, spur, and jitter techniques.
  • Knowledge of clocking fundamentals, phase noise, jitter analysis, behavioral modeling, and design tools.

Tools

PLL/FLL, DCO/VCO, Fractional-N, System Verilog, RTL

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 4, 2026 (UTC)