Apple
Pre-Silicon Digital Verification Engineer
$150K–$278K
Sunnyvale, California · Full-time · Posted Oct 26, 2026
- Experience
- Minimum of 3 years of relevant industry experience.
- Education
- BS
About the job
Verifies digital IP for mixed-signal ASICs by creating verification plans, testbenches, and test cases, and tracking coverage and readiness for tapeout.
What you'll do
- Develop design specifications and block- and chip-level verification plans and environments.
- Build verification elements and use System Verilog, UVM, formal verification, and assertions to test designs.
- Debug test failures, collaborate with designers on fixes, and use coverage to assess tapeout readiness.
What they ask for
- BS degree.
- Minimum of 3 years of relevant industry experience.
Nice to have
- Coursework or experience in digital design, computer architecture, object-oriented programming, System Verilog, constrained-random verification, clock-domain crossing, or analog circuit design.
Pay
$150,400 and $277,600 USD base salary
Tools
System Verilog, UVM, System Verilog Assertions
Model-written summary · the original posting is authoritative