Apple
RFIC Layout Engineer
$118K–$218K
Irvine, California +2 · Full-time · Posted Sep 11, 2026
- Location
- Irvine, California
San Diego, California
Sunnyvale, California - Education
- Bachelor’s degree
About the job
Designs and integrates transistor-level RF and analog circuit layouts for wireless silicon, completing layout verification and collaborating on floorplanning and reviews.
What you'll do
- Create block-level and top-level RF/analog layouts and complete extraction, DRC, LVS, and DFM verification.
- Collaborate with circuit designers on floorplanning and resolve layout risks; review routing, electromigration, matching, and signal coupling.
- Integrate and verify top-level layouts and manage schedules.
What they ask for
- Bachelor’s degree.
- Understanding of RC delay, electromigration, and coupling.
- Ability to identify failure-prone circuit and layout structures and work with circuit designers to resolve issues.
- Good communication skills and ability to work with multifunctional teams.
Nice to have
- Custom RF/analog transceiver layout experience with deep sub-micron CMOS (16nm and lower, including FinFet); knowledge of matching, parasitic reduction, RF shielding, and high-frequency routing.
- Knowledge of guard rings, DNW, PN junctions, process effects, CALIBRE verification, CADENCE layout tools, or scripting in PERL or SKILL.
Pay
$118,019 and $207,100 annualized USD (base salary); $123,739 and $218,000 annualized USD (base salary)
Tools
CMOS, FinFet, CALIBRE, PERL, SKILL, CADENCE
Model-written summary · the original posting is authoritative