Apple
RTL Design Engineer
$129K–$225K
Cupertino, California · Full-time · Posted Apr 10, 2026
- Education
- Bachelor of Science in Electrical Engineering.
About the job
Design, implement, verify, integrate, and support lab bring-up of digital and mixed-signal circuits, including signal-processing blocks and DSP algorithms.
What you'll do
- Specify or micro-architect digital and signal-processing blocks, and develop RTL implementations.
- Write assertions and testbenches, participate in verification, and debug designs.
- Integrate IP and support silicon lab characterization, including test scripts and signal-processing performance analysis.
What they ask for
- Bachelor of Science in Electrical Engineering.
Nice to have
- Front-end tools expertise, synthesis, static timing analysis, DFT, formal verification, and low-power design methodologies.
- DSP implementation and hardware optimization experience; scripting with Perl or Python; intermediate to advanced GenAI proficiency for SystemVerilog design, validation, and optimization.
Pay
$129,300 and $225,300 (base salary range)
Tools
Verilog, SystemVerilog, Perl, Python
AI focus
Use GenAI tools for SystemVerilog design, validation, and optimization, and understand their capabilities and limitations in hardware design.
Model-written summary · the original posting is authoritative