Apple
RTL Design Engineer
Cary, North Carolina · Full-time · Posted Jan 16, 2026
- Experience
- Minimum of 10 years relevant industry experience.
- Education
- BS
About the job
Specify, design, verify, and support lab bring-up of digital and mixed-signal circuits, including RTL development and integration of mixed-signal and analog IP.
What you'll do
- Specify or micro-architect digital blocks and write RTL for mixed-signal circuits.
- Support verification through assertions, debugging, and collaboration with the design verification team.
- Contribute to lab bring-up by writing test scripts, analyzing lab data, and proposing experiments.
What they ask for
- BS degree.
- Minimum of 10 years of relevant industry experience.
Nice to have
- RTL design knowledge, including Verilog and SystemVerilog.
- Experience with front-end tools, low-power design, ECO flows, mixed-signal concepts, synthesis, timing, DFT, verification techniques, scripting, GenAI tools, or digital signal processing.
Tools
Verilog, SystemVerilog, Perl, JSON, Python
AI focus
Use GenAI tools, including large language models and AI-assisted code generation, to design, validate, and optimize SystemVerilog RTL code.
Model-written summary · the original posting is authoritative