Drimva

Apple

RTL Design Engineer

$123K–$214K

Irvine, California · Full-time · Posted Apr 10, 2026

Education
Bachelor of Science in Electrical Engineering.

About the job

Design, verify, integrate, and support lab bring-up of RTL for digital and mixed-signal circuits, including signal-processing blocks.

What you'll do

  • Specify and micro-architect digital and signal-processing blocks; implement them in RTL, including DSP algorithms.
  • Write assertions and testbenches, participate in verification, and debug designs with verification teams.
  • Integrate IP and support silicon lab characterization, including test scripting and signal-processing performance analysis.

What they ask for

  • Bachelor of Science in Electrical Engineering.

Nice to have

  • Front-end tools, synthesis, static timing analysis, DFT, formal verification, and low-power design methods.
  • DSP implementation experience, scripting in Perl or Python, and intermediate-to-advanced GenAI proficiency for hardware design.

Pay

$122,700–$214,300 USD base salary

Tools

Verilog, SystemVerilog, Perl, Python

AI focus

Use GenAI tools for SystemVerilog design, validation, and optimization, and understand their capabilities and limitations in hardware design.

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 4, 2026 (UTC)