Drimva

Apple

RTL Design Engineer

Austin, Texas · Full-time · Posted Apr 10, 2026

Education
Bachelor of Science in Electrical Engineering.

About the job

Design, verify, integrate, and support lab bring-up of digital and mixed-signal RTL blocks, including signal-processing implementations.

What you'll do

  • Specify or micro-architect digital and signal-processing blocks; develop RTL and translate DSP algorithms into hardware.
  • Write assertions and testbenches, participate in verification, and debug designs with verification teams.
  • Integrate IP and support silicon lab characterization by scripting tests, analyzing data, and validating signal-processing performance.

What they ask for

  • Bachelor of Science in Electrical Engineering.

Nice to have

  • Front-end design tools, synthesis, static timing analysis, DFT, SystemVerilog assertions, scripting, formal verification, and low-power design methodologies.
  • DSP implementation and hardware optimization experience; intermediate to advanced GenAI proficiency for SystemVerilog design, validation, and optimization.

Tools

Verilog, SystemVerilog, Perl, Python

AI focus

Use GenAI tools for SystemVerilog design, validation, and optimization, and understand their capabilities and limitations in hardware design.

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)