Apple
RTL Design Engineer
$166K–$292K
Waltham, Massachusetts · Full-time · Posted Oct 21, 2025
- Experience
- Minimum of 10 years relevant industry experience.
- Education
- BS
About the job
Specifies, designs, verifies, and supports lab bring-up of digital and mixed-signal circuits, including micro-architecting blocks, writing RTL, and analyzing lab data.
What you'll do
- Specify and/or micro-architect digital blocks and write RTL for mixed-signal circuits.
- Support design verification through assertions, debugging, and collaboration with the verification team.
- Contribute to lab bring-up by writing test scripts, analyzing data, and proposing experiments.
What they ask for
- BS degree
- Minimum of 10 years relevant industry experience
Nice to have
- RTL design, Verilog, SystemVerilog, and front-end tools
- Mixed-signal concepts, analog behavioral modeling, low-power design, verification, synthesis, timing, DFT, scripting, and GenAI-assisted RTL workflows
Pay
USD $165,800 to $292,400 base salary
Tools
Verilog, SystemVerilog, Perl, JSON, Python
AI focus
Using GenAI tools, such as large language models and AI-assisted code generation, to design, validate, and optimize SystemVerilog RTL code.
Model-written summary · the original posting is authoritative