SerDes Circuit Design Engineer

What you'll do

• Evaluate circuit topologies and develop SerDes PHY circuits, including receivers, clock and data recovery, transmitters, clocking, and calibration.
• Create block specifications, implement transistor-level designs and behavioral models, and drive mask design and layout.
• Coordinate with cross-functional and SoC teams to deliver IP views that meet quality standards.

What they ask for

• Bachelor’s degree.
• Strong understanding of analog/mixed-signal design and high-speed serial links.
• Experience designing analog/mixed-signal circuit blocks and applying circuit concepts such as mismatch mitigation, linearity, stability, and low-power/low-noise techniques.
• Experience with analog/mixed-signal modeling and performance evaluation using tools such as SystemVerilog, Matlab, Python, or VerilogAMS.

Nice to have

• Experience with advanced CMOS and FinFet technologies, high-speed SerDes testing, and AMS IC development through production.
• Knowledge of SerDes protocols, CDR, equalization, digitally assisted analog design, timing-closure tools, or scripting and automation.

Tools

SystemVerilog, Matlab, Python, VerilogAMS, FinFet, Nanotime, Primetime, PCIe