Apple
SerDes Design and Validation Engineer
$175K–$325K
Austin, Texas +3 · Full-time · Posted Oct 1, 2026
- Location
- Austin, Texas
Beaverton, Oregon
Cupertino, California
San Diego, California - Experience
- Minimum of 10 years relevant industry experience.
- Education
- BS
About the job
Leads SerDes system bring-up, validation, and debug while contributing to mixed-signal PHY design, testability, and verification.
What you'll do
- Own SerDes system bring-up, validation, and debug, including checks of operation, robustness, and margins.
- Work with design teams to define DFT needs and improve testability and first-time silicon success.
- Perform mixed-signal verification and collaborate on test planning, data analysis, and production testing.
What they ask for
- BS degree.
- Minimum of 10 years of relevant industry experience.
Nice to have
- Experience in high-speed serial links and analog/mixed-signal circuit design, validation, and production testing.
- Knowledge of SerDes protocols and equalization/CDR techniques; scripting and automation, firmware-assisted IP development, and AI/ML application are desirable.
Pay
$184,700 and $324,800 (base salary); $175,000 and $308,500 (base salary)
Tools
ATE, PCIe, USB, DP, MPHY, CTLE, DFE, LMS
AI focus
Knowledge of AI/ML and ability to apply these concepts to improve silicon performance and productivity in IP design and validation.
Model-written summary · the original posting is authoritative