Apple
SerDes Design and Validation Engineer
$123K–$225K
Austin, Texas +3 · Full-time · Posted Jul 29, 2026
- Location
- Austin, Texas
Beaverton, Oregon
Cupertino, California
San Diego, California - Education
- Bachelor’s degree.
About the job
Leads system bring-up, validation, and debugging of SerDes IP, collaborating on mixed-signal design, testability, and validation for high-speed serial links.
What you'll do
- Own SerDes system bring-up, validation, and debug, including checking basic operation and analyzing robustness and margins.
- Work with design teams to define DFT needs and improve testability and first-time silicon success.
- Perform mixed-signal verification and develop test plans; analyze data and collaborate with production test and system-validation teams.
What they ask for
- Bachelor’s degree.
Nice to have
- Experience with high-speed serial links and mixed-signal circuit design, verification, or production testing.
- Scripting and automation skills; knowledge of AI/ML applications for silicon performance or design/validation productivity.
Pay
$129,300 and $225,300 (base pay range); $122,700 and $214,300 (base pay range)
Tools
SerDes, ATE, PCIe, USB, DP, MPHY, CTLE, DFE
AI focus
Apply AI/ML concepts to improve silicon performance and productivity in IP design and validation.
Model-written summary · the original posting is authoritative