Apple
SOC Design Verification Engineer
$166K–$325K
Irvine, California +3 · Full-time · Posted Oct 27, 2026
- Location
- Irvine, California
San Diego, California
Sunnyvale, California
Waltham, Massachusetts - Experience
- Minimum 10 years of relevant industry experience.
- Education
- BS
About the job
Own pre-silicon verification for wireless SOC blocks, subsystems, and top-level integration, from planning through coverage closure and signoff.
What you'll do
- Develop reusable UVM testbenches, create tests and coverage models, debug failures, and drive coverage closure.
- Verify low-power intent and end-to-end WiFi and Bluetooth traffic; apply formal methods where appropriate.
- Improve regression flows and verification methodology, explore AI-assisted techniques, and support post-silicon bring-up as needed.
What they ask for
- Hands-on experience across the verification cycle, including test planning, testbench implementation, test creation and debug, and coverage closure.
- Strong SystemVerilog and Verilog skills, with solid working knowledge of UVM.
- Problem-solving and debugging skills with constrained-random verification.
- Understanding of digital logic design, SOC architecture, and microarchitecture.
Nice to have
- Experience taking an ASIC/SOC from concept through tape-out; verification experience with PCIe, bus fabric/NOC, or AHB/AXI architectures.
- WiFi/Bluetooth SOC or wireless protocol experience; low-power verification, UPF, SVA/formal, scripting, or AI/ML verification experience.
Pay
$175,000 and $308,500 USD base salary; $184,700 and $324,800 USD base salary; $165,800 and $292,400 USD base salary
Tools
SystemVerilog, Verilog, UVM, UPF, PCIe, AHB/AXI, JasperGold, Python
AI focus
Explore and apply AI-assisted verification techniques, including potential use in test generation, debug, and coverage closure.
Model-written summary · the original posting is authoritative