Apple
SoC Design Verification Engineer
$129K–$225K
Austin, Texas +1 · Full-time · Posted Oct 27, 2026
- Location
- Austin, Texas
Sunnyvale, California - Education
- Bachelor’s degree required; MSEE, MSCS, or beyond preferred.
About the job
Verify and help productize cellular 5G SoCs by developing reusable UVM test environments, coverage-driven plans, and verification infrastructure.
What you'll do
- Develop verification plans, testbenches, sequences, and infrastructure for IP, subsystems, and SoCs; integrate environments and target coverage.
- Collaborate with design, architecture, software, firmware, and external IP teams to integrate and verify SoC designs.
- Work with methodology architects to improve verification flows and apply AI/ML verification methodology.
What they ask for
- Bachelor’s degree.
- Knowledge of object-oriented programming principles through coursework, research, or project experience in an OOP-based language.
- Coursework in Digital Design.
Nice to have
- Graduate degree (MSEE, MSCS, or beyond); coursework in Computer Architecture or Networking Protocol.
- Hands-on SystemVerilog UVM testbench development, digital design experience, or experience developing DUT reference models and verifying with HVL.
Pay
USD $129,300 to $225,300 base salary
Tools
UVM, SystemVerilog, Python, C++, Java, SPI, I2C, UART
AI focus
Develop and deploy AI/ML methodology for verification.
Model-written summary · the original posting is authoritative