Apple
SoC DFT Engineer
$124K–$187K
Austin, Texas +1 · Full-time · Posted Apr 10, 2026
- Location
- Austin, Texas
Cupertino, California - Experience
- Minimum of 0 years relevant industry experience.
- Education
- BS
About the job
Develop and implement design-for-test (DFT) solutions for SoC projects, from architecture and verification through test-vector generation and silicon bring-up.
What you'll do
- Develop DFT architecture and infrastructure; coordinate across semiconductor design teams.
- Verify DFT implementations with the DV team, implement ECOs, and generate structural test vectors while improving coverage.
- Support test-vector bring-up on silicon and collaborate on timing, physical, power, and logical issues.
What they ask for
- BS degree.
- At least 0 years of relevant industry experience.
Nice to have
- Knowledge of DFT practices and standards, including ATPG, JTAG, and MBIST, and trade-offs between test quality and test time.
- Experience with DFT architecture or specifications, Verilog and/or VHDL, simulation and waveform debugging, DV, STA, silicon debug, or ATE-data scripting.
Pay
$123,700 and $186,900 (USD, base salary)
Tools
ATPG, JTAG, MBIST, Verilog, VHDL, STA, SDF, ATE
Model-written summary · the original posting is authoritative