Apple
SoC DFT Engineer
$158K–$312K
Austin, Texas +2 · Full-time · Posted Apr 10, 2026
- Location
- Austin, Texas
Cupertino, California
Waltham, Massachusetts - Experience
- Minimum 10 years of relevant industry experience.
- Education
- BS
About the job
Develops and implements design-for-test solutions for SoC projects, from DFT architecture and test-vector generation through verification and silicon bring-up.
What you'll do
- Develop DFT architecture and infrastructure; verify implementations with the DV team and implement ECOs.
- Generate structural test vectors, analyze and improve coverage, and collaborate on STA, physical, power, and logical issues.
- Bring up test vectors on silicon with test engineers and support schedules and cross-functional engineering efforts.
What they ask for
- BS degree.
- Knowledge of industrial DFT standards and practices, including ATPG, JTAG, and MBIST.
- Knowledge of Verilog and/or VHDL, simulators, and waveform debugging tools.
- Understanding of DV methodologies for pre-silicon simulation validation of DFT implementations.
Nice to have
- Experience developing DFT specifications and driving DFT architecture and methods.
- Experience debugging compressed ATPG patterns, MBIST, JTAG/1500 issues, or DFT-mode STA constraints and SDF simulations.
Pay
$175,500 and $311,700 USD base salary; $157,700 and $280,600 USD base salary
Tools
ATPG, JTAG, MBIST, Verilog, VHDL, STA, SDF, ATE
Model-written summary · the original posting is authoritative