Apple
SoC DRAM Memory Subsystem Validation Engineering Program Manager
$167K–$312K
Cupertino, California +1 · Manager · Full-time · Posted Sep 29, 2026
- Location
- Cupertino, California
San Diego, California - Experience
- 10 years of relevant experience; no alternatives stated.
- Education
- BS
About the job
Leads readiness, validation, debug, and technology adoption for Apple SoC DRAM memory subsystems from architecture through mass production.
What you'll do
- Coordinate silicon issues and post-silicon debug across design, verification, validation, productization, hardware, and software teams.
- Plan DRAM technology adoption, custom package development, and qualification with internal teams and vendors.
- Manage vendor actions, DRAM material distribution, NPI collaboration, and program processes to meet quality, specification, and schedule goals.
What they ask for
- BS + 10 years of relevant experience.
- Prior experience in SOC DRAM Memory Design, Validation, Architecture or Test/Product Engineering.
Nice to have
- Knowledge of high-performance memory subsystems, including SoC memory architecture, DDR controller, PHY, high-speed IO, DRAM, and calibration/training.
- Experience shipping high volume DRAMs / SoCs; experience with major DRAM vendors or DRAM device validation is a plus.
Pay
$166,600 and $296,000 (USD, base salary); $175,500 and $311,700 (USD, base salary)
Tools
SoC, DRAM, DDR, PHY, DFT
Model-written summary · the original posting is authoritative