Apple
SoC Full Chip DV Engineer
$129K–$195K
Austin, Texas +1 · Full-time · Posted Apr 10, 2026
- Location
- Austin, Texas
Cupertino, California - Experience
- Minimum of 0 years of relevant industry experience.
- Education
- BS
About the job
Verify the functionality and performance of Apple SoCs or their IP and subsystems by developing verification plans, tests, coverage, and methodology.
What you'll do
- Review design and architecture specifications and collaborate with design, micro-architecture, architecture, and software teams to understand use cases and corner cases.
- Develop test plans, tests, coverage plans, verification methodology, and test benches; drive test cases.
- Run and triage regressions, track bugs, and analyze coverage.
What they ask for
- Bachelor of Science degree.
- Knowledge of Verilog/SystemVerilog, digital simulation, and debug.
- Knowledge of computer architecture and digital design fundamentals.
Nice to have
- Experience with constrained-random verification, functional and code coverage, and assertion methodology.
- Exposure to UVM; experience with C/C++, assembly, or Perl, Python, or similar scripting languages.
Pay
$129,300 to $194,700 USD base salary
Tools
Verilog, SystemVerilog, UVM, C/C++, assembly, perl, python
Model-written summary · the original posting is authoritative