Apple
SoC Full Chip DV Engineer
$185K–$325K
Austin, Texas +1 · Full-time · Posted Apr 10, 2026
- Location
- Austin, Texas
Cupertino, California - Experience
- Minimum 10 years relevant industry experience.
- Education
- BS
About the job
Verifies the functionality and performance of Apple SoCs or their IP and subsystems by developing verification plans, tests, coverage, and test benches, and analyzing regressions and bugs.
What you'll do
- Review design and architecture specifications and collaborate with design, micro-architecture, architecture, and software teams to define test cases.
- Develop test plans, tests, coverage plans, verification methodology, and test benches.
- Run and triage regressions, track bugs, and analyze coverage.
What they ask for
- Minimum of BS + 10 years relevant industry experience.
Nice to have
- Skills in digital verification, including constrained random verification, functional and code coverage, and assertion methodology.
- Knowledge of Verilog/SystemVerilog, digital simulation and debug, computer architecture, and digital design fundamentals; exposure to UVM is desired.
Pay
USD $184,700 to $324,800 base salary
Tools
Verilog, SystemVerilog, UVM, C/C++, assembly, perl, python
Model-written summary · the original posting is authoritative