Apple
SoC Full Chip DV Engineer
$150K–$278K
Austin, Texas +1 · Full-time · Posted Apr 10, 2026
- Location
- Austin, Texas
Cupertino, California - Experience
- Minimum of 3 years of relevant industry experience.
- Education
- BS
About the job
Verifies the functionality and performance of Apple SoCs or their IP and subsystems by planning and running tests, analyzing coverage, and collaborating with design, architecture, and software teams.
What you'll do
- Review design and architecture specifications and develop test plans, tests, coverage plans, and verification methodology and test benches.
- Run and triage regressions, track bugs, and analyze coverage.
- Collaborate with design, architecture, and software teams to understand use cases and corner conditions and drive test cases.
What they ask for
- Bachelor of Science degree and at least 3 years of relevant industry experience.
Nice to have
- Digital verification skills, including constrained random verification, functional and code coverage, and assertion methodology; knowledge of Verilog/SystemVerilog, simulation and debug, computer architecture, and digital design fundamentals.
- Exposure to UVM; experience with C/C++, assembly, or Perl, Python, or similar scripting languages.
Pay
$150,400 and $277,600 (base salary range)
Tools
Verilog/SystemVerilog, UVM, C/C++, assembly, perl, python
Model-written summary · the original posting is authoritative