Apple
SoC Physical Design Engineer, PnR
$123K–$185K
San Diego, California · Full-time · Posted Sep 24, 2026
- Experience
- 0+ years.
- Education
- Minimum BS.
About the job
Implement and verify SoC design partitions from netlist through tapeout, driving physical design signoff and closure.
What you'll do
- Collaborate with logic design teams to understand partition architecture and address physical design early.
- Complete netlist-to-GDS2 implementation while meeting schedule and design goals.
- Perform timing, physical, and electrical verification; resolve design and flow issues and drive signoff closure.
What they ask for
- Basic understanding of logic gates.
Nice to have
- Internship, co-op, project work, or relevant coursework in computer architecture, VLSI, design, logic design, or circuit design.
- Teamwork and collaboration skills; experience with Verilog, VHDL, Python, Perl, TCL, and/or SPICE.
Pay
$122,700 and $184,800 (base salary range; USD)
Tools
PnR, STA, DRC/LVS, EMIR, Redhawk, Totem, Voltus, GDS2
Model-written summary · the original posting is authoritative