Apple
SoC Physical Design Engineer, PnR
$185K–$325K
San Jose, California · Full-time · Posted Apr 14, 2026
- Experience
- 10+ years of relevant industry experience.
- Education
- Minimum BS; preferred MS in Electrical/Electronics/Computer Engineering or related field.
About the job
Implement and optimize SoC physical design partitions from netlist through tapeout, closing timing and verification signoff while meeting power, performance, area, and schedule goals.
What you'll do
- Partner with logic design to understand partition architecture and address physical design early.
- Complete netlist-to-GDS2 implementation, including timing, physical, and electrical verification and signoff.
- Resolve physical design and flow issues and optimize partitions for power, performance, and area.
What they ask for
- BS degree and 10+ years of relevant industry experience.
- Experience with partition-level P&R, including floorplanning, clock and power distribution, timing closure, and physical and electrical verification.
- Experience with physical design construction and analysis flows and methodology.
Nice to have
- MS in Electrical/Electronics/Computer Engineering or a related field.
- Experience with large SoC designs, multi-vt strategies, process-related design issues, or industry-standard physical-design tools and flows.
Pay
$184,700 and $324,800 (base salary)
Tools
P&R, GDS2, Design for Yield and Manufacturability, multi-vt
Model-written summary · the original posting is authoritative