Drimva

Apple

SoC Physical Design Engineer, PnR

Austin, Texas · Full-time · Posted Jul 17, 2026

Experience
10+ years of relevant industry experience.
Education
Minimum BS.

About the job

Leads SoC physical design implementation from RTL to GDS, shaping physical architecture and improving timing, area, and power in collaboration with cross-functional teams.

What you'll do

  • Own physical design implementation, including PnR, bump/RDL, STA, physical verification, EMIR, and sign-off.
  • Develop physical design methodologies, best-known methods, guidelines, and checklists.
  • Serve as the technical contact for the focus area and resolve challenging timing-closure, area, and power issues.

What they ask for

  • Bachelor of Science degree.
  • 10+ years of relevant industry experience.

Nice to have

  • Partition-level P&R experience, including floorplanning, clock and power distribution, timing closure, and physical and electrical verification.
  • Experience with PD flows and methodology, recent deep-submicron tapeouts, large SoCs, industry-standard tools, and stringent schedules and die-size requirements; strong interpersonal skills.

Tools

RTL2GDS, PnR, bump/RDL, STA, EMIR

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)