Apple
SoC Physical Design Engineer, PnR
$175K–$308K
Beaverton, Oregon +1 · Full-time · Posted Apr 14, 2026
- Location
- Beaverton, Oregon
Seattle, Washington - Experience
- 10+ years of relevant industry experience.
- Education
- Minimum BS; preferred MS in Electrical/Electronics/Computer Engineering or related field.
About the job
Own physical implementation of SoC design partitions from netlist through tapeout, including verification, signoff, and PnR optimization.
What you'll do
- Work with logic design to understand partition architecture and guide physical design early in the cycle.
- Complete netlist-to-GDS2 implementation and close timing, physical, and electrical signoff.
- Resolve physical design and flow issues and optimize partitions for Power/Performance/Area.
What they ask for
- Minimum BS degree.
- 10+ years of relevant industry experience.
Nice to have
- MS in Electrical/Electronics/Computer Engineering or related field.
- Experience with partition-level P&R, SoC implementation, physical design flows, and industry-standard tools.
Pay
USD $175,000 to $308,500 base salary
Tools
GDS2, PnR
Model-written summary · the original posting is authoritative