Apple
SoC Physical Design Engineer, PnR
$116K–$175K
Waltham, Massachusetts · Full-time · Posted Apr 15, 2026
- Experience
- 0+ years.
- Education
- Minimum BS degree.
About the job
Implements SoC design partitions from netlist through tapeout, completing physical design, verification, and signoff closure.
What you'll do
- Collaborate with logic design teams to understand partition architecture and address physical design early.
- Complete netlist-to-GDS2 implementation to meet schedule and design goals.
- Perform timing, physical, and electrical verification; resolve design and flow issues and drive signoff closure.
What they ask for
- Minimum BS degree.
- 0+ years of experience.
- Basic understanding of logic gates.
Nice to have
- Internship/co-op, project work, or relevant coursework in computer architecture, VLSI, design, logic design, or circuit design.
- Teamwork and collaboration skills; experience with Verilog, VHDL, Python, Perl, TCL, and/or SPICE.
Pay
$116,400 and $175,200 USD base salary
Tools
Verilog, VHDL, Python, Perl, TCL, SPICE, Redhawk, Totem
Model-written summary · the original posting is authoritative