Apple
SoC Physical Design Engineer, PnR
Beaverton, Oregon · Full-time · Posted Apr 14, 2026
- Experience
- 3+ years of relevant industry experience.
- Education
- BS
About the job
Implements SoC design partitions from netlist to tapeout, including physical design, verification, and signoff closure.
What you'll do
- Work with logic design teams to understand partition architecture and address physical design early.
- Complete netlist-to-GDS2 implementation to meet schedule and design goals.
- Perform timing, physical, and electrical verification; resolve design and flow issues and drive signoff closure.
What they ask for
- Bachelor’s degree (BS).
- 3+ years of relevant industry experience.
Nice to have
- Partition-level P&R experience, including floorplanning, clock and power distribution, timing closure, and physical and electrical verification.
- Experience with physical design flows, large SoCs, sub-10nm technologies, and industry-standard tools; strong communication skills.
Tools
P&R, GDS2
Model-written summary · the original posting is authoritative