Apple
SoC Physical Design Engineer, PnR
$135K–$250K
Waltham, Massachusetts · Full-time · Posted Apr 15, 2026
- Experience
- 3+ years of relevant industry experience.
- Education
- Minimum BS.
About the job
Leads SoC physical design implementation from RTL to GDS, shaping chip and IP physical architecture and improving timing, area, and power outcomes.
What you'll do
- Own physical design implementation, including PnR, bump/RDL, STA, physical verification, EMIR, and sign-off.
- Collaborate on physical design methodologies, best-known methods, guidelines, and checklists.
- Serve as the primary technical contact for a focus area and solve timing-closure, area, and power challenges.
What they ask for
- Minimum BS degree.
- At least 3 years of relevant industry experience.
Nice to have
- Partition-level P&R experience, including floorplanning, clock and power distribution, timing closure, and physical and electrical verification.
- PD flow and methodology knowledge; recent deep-submicron tapeouts; experience with large, high-frequency SoCs; ability to meet schedule and die-size constraints; familiarity with industry-standard tools.
Pay
$134,700 to $249,500 USD base salary
Tools
RTL2GDS, PnR, bump/RDL, STA, EMIR
Model-written summary · the original posting is authoritative