Apple
SoC Physical Design Engineer, STA/Timing
$166K–$292K
Waltham, Massachusetts · Full-time · Posted Jun 10, 2026
- Experience
- 10+ years of relevant industry experience.
- Education
- Minimum BS.
About the job
Own physical implementation and timing analysis of complex SoC design partitions from netlist through tapeout.
What you'll do
- Debug constraints with design teams and facilitate logic changes to improve timing; analyze timing paths and create timing ECOs for tapeout.
- Work with the Physical Design team to identify issues and share best practices; implement timing infrastructure.
- Create and maintain analysis scripts and methodologies, and produce documentation and guidelines.
What they ask for
- Bachelor’s degree (BS).
- Strong programming skills with TCL.
Nice to have
- Experience with large-design STA and/or timing closure, including high-performance SoC timing in sub-micron technologies.
- Knowledge of timing effects and modeling, SPICE simulation, ECO implementation, or scripting with Perl or python.
Pay
$165,800 to $292,400 USD base salary
Tools
TCL, Perl, python, SPICE
Model-written summary · the original posting is authoritative