Apple
SoC Physical Design Engineer, Top Level
$175K–$308K
Beaverton, Oregon +1 · Full-time · Posted Sep 21, 2026
- Location
- Beaverton, Oregon
Seattle, Washington - Experience
- 10+ years of relevant industry experience.
- Education
- BS
About the job
Leads top-level SoC physical design implementation from netlist through tapeout, coordinating architecture, place-and-route execution, methodologies, and issue resolution.
What you'll do
- Partner with front-end teams to understand chip architecture and address physical design early in the cycle.
- Drive place-and-route execution, methodologies, guidelines, milestones, and cross-domain dependencies.
- Resolve physical design and flow issues and drive solutions.
What they ask for
- Bachelor’s degree and 10+ years of relevant industry experience.
Nice to have
- ASIC integration experience, including floorplanning, clock and power distribution, I/O planning, hard IP integration, and multiple voltage and clock domains.
- Experience with large SoCs, hierarchical design, physical design tools and verification flows, and process-related design considerations.
Pay
USD $175,000–$308,500 base salary
Tools
ASIC, SoC, P&R
Model-written summary · the original posting is authoritative