Apple
STA Engineer
$150K–$278K
Austin, Texas +1 · Full-time · Posted Apr 10, 2026
- Location
- Austin, Texas
Cupertino, California - Experience
- 3 years of experience.
- Education
- Bachelor’s degree.
About the job
Own timing closure and timing verification for Apple SoC blocks and full-chip designs, while developing timing methodology and coordinating with SOC teams.
What you'll do
- Own block-level and full-chip timing closure throughout the project.
- Develop and maintain timing verification and closure methodology and flows; generate timing constraints.
- Collaborate with cross-functional teams to resolve complex timing issues in SoC building blocks.
What they ask for
- Bachelor’s degree.
- 3 years of experience.
Nice to have
- Proficiency in TCL and Perl scripting; familiarity with ASIC timing concepts and digital design.
- Exposure to Primetime or front-end tools and methodologies, such as synthesis and logic equivalence checks.
Pay
$150,400 and $277,600 (base salary range)
Tools
TCL, Perl, Primetime, Synopsys GCA (Galaxy Constraint Analyzer)
Model-written summary · the original posting is authoritative