Apple
Wireless SoC Design Engineer
$123K–$225K
Irvine, California +2 · Full-time · Posted Oct 16, 2026
- Location
- Irvine, California
San Diego, California
Sunnyvale, California - Education
- Bachelor’s degree required.
About the job
Designs CPU-based subsystems for low-power wireless SoCs, from micro-architecture and RTL development through IP integration, verification support, and power, performance, and area optimization.
What you'll do
- Write micro-architecture and design specifications, then develop RTL in SystemVerilog.
- Integrate IP blocks and optimize memories and hard macros; check designs with static tools such as LINT, CDC, and RDC.
- Support verification and analyze and optimize area, timing, and power in collaboration with cross-functional teams.
What they ask for
- Bachelor’s degree.
- Familiarity with the ASIC design flow.
- Knowledge of digital design, SoC architecture, and HDL languages such as Verilog.
Nice to have
- MSEE with some years of industry experience; experience writing micro-architecture specifications and translating them into designs.
- Exposure to design methodologies and industry-standard EDA tools; experience with AXI/AHB bus fabric and processor subsystems; understanding of UPF and low-power design and implementation techniques.
Pay
$122,700 and $214,300 (base salary); $129,300 and $225,300 (base salary)
Tools
SystemVerilog, Verilog, LINT, CDC, RDC, AXI/AHB, UPF
Model-written summary · the original posting is authoritative