Apple
Wireless SoC Design Engineer
$166K–$325K
Irvine, California +3 · Full-time · Posted Oct 16, 2026
- Location
- Irvine, California
San Diego, California
Sunnyvale, California
Waltham, Massachusetts - Experience
- 10+ years of relevant experience.
- Education
- BS
About the job
Designs and integrates CPU-based subsystems for high-performance, low-power wireless SoCs, optimizing power, performance, and area for Apple devices.
What you'll do
- Write micro-architecture specifications and develop RTL in SystemVerilog; integrate IP blocks and optimize memories and hard macros.
- Support verification and run static checks, including LINT, CDC, and RDC.
- Analyze and optimize area, timing, and power while coordinating with cross-functional teams to deliver designs.
What they ask for
- Familiarity with the ASIC design flow.
- Knowledge of digital design and SoC architecture.
- Knowledge of HDL languages such as Verilog.
Nice to have
- Experience writing micro-architecture specifications and translating them into designs; exposure to design methodologies and industry-standard EDA tools.
- Experience with AXI/AHB bus fabric and processor subsystems; understanding of UPF and low-power design and implementation techniques.
Pay
$175,000 and $308,500 (base salary); $184,700 and $324,800 (base salary); $165,800 and $292,400 (base salary)
Tools
SystemVerilog, Verilog, LINT, CDC, RDC, AXI/AHB, UPF
Model-written summary · the original posting is authoritative