Apple
Wireless SOC Design Verification Engineer
$175K–$325K
Irvine, California +2 · Full-time · Posted Oct 27, 2026
- Location
- Irvine, California
San Diego, California
Sunnyvale, California - Experience
- Minimum of 10 years of relevant industry experience.
- Education
- BS
About the job
Own end-to-end verification for wireless SOC projects, from test planning through signoff, including WiFi and Bluetooth traffic flows and low-power design intent.
What you'll do
- Plan and execute verification, debug failures, and close coverage or proof across the project lifecycle.
- Verify low-power intent using UPF and WiFi/Bluetooth flows from subsystem through top-level SOC integration.
- Choose verification methods, support post-silicon bring-up as needed, and help advance AI-assisted verification.
What they ask for
- BS degree.
- Minimum 10 years of relevant industry experience.
- Proven experience across the full ASIC cycle from concept through tape-out and bring-up, including test planning, testbench implementation, test sequence creation and debugging, and coverage closure.
- Expertise in SystemVerilog coding and UVM methodology.
Nice to have
- UVM verification experience with PCIe, Bus Fabric, NOC, AHB, or AXI-based bus architecture; WiFi or Bluetooth SOC verification experience.
- Formal Verification, low-power/UPF, boot-up, power-cycling, HW/FW interaction verification, or large SOC tape-out experience.
Pay
$175,000 and $308,500 USD base salary; $184,700 and $324,800 USD base salary
Tools
SystemVerilog, UVM, UPF, PCIe, Bus Fabric, NOC, AHB, AXI
AI focus
Help identify where AI-assisted verification can improve test generation, debug, verification closure, or other workflows.
Model-written summary · the original posting is authoritative