Drimva

Architect Labs

Member of Technical Staff - AI for Chip Design

Palo Alto · On-site · Staff · Full-time · Posted Apr 23, 2026

Experience
Strong industry or research experience is requested; no specific number of years is stated.
Education
MS or PhD in Electrical Engineering, Computer Engineering, EECS, or a closely related field.

About the job

Build AI agents and end-to-end workflows that apply hardware engineering expertise to chip-design tasks, including generating and verifying silicon designs.

What you'll do

  • Design and build AI agents for core chip-design tasks, grounded in hardware engineering practice.
  • Own agent workflows, including scaffolding, tool use, evaluation harnesses, and domain-specific infrastructure.
  • Curate data, define evaluation criteria, and collaborate with ML research, post-training, and infrastructure teams on reward signals, benchmarks, and training signals.

What they ask for

  • MS or PhD in Electrical Engineering, Computer Engineering, EECS, or a closely related field.
  • Strong industry or research experience as an RTL design or Design Verification engineer, with understanding of the end-to-end modern chip-design flow.
  • Excellent software engineering fundamentals; able to write clean, production-grade Python or typescript and build tooling.
  • Ability to own ambiguous problems end to end, prototype quickly, and productionize effective solutions.

Nice to have

  • Prior AI-for-chip-design or AI4EDA experience at Google, NVIDIA, or chip/EDA companies; LLM-based tooling experience for engineering workflows.
  • Publications or open-source contributions at the intersection of ML and EDA, or experience as an early engineer at a deeptech or AI startup.

Tools

Python, typescript

AI focus

Develop and evaluate AI agents for chip design; contribute hardware expertise, data, benchmarks, reward signals, and training signals to AI workflows.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 6, 2026 (UTC)