Arm
Senior Post-Silicon PCIe Characterization Engineer
$162K–$218K
Chandler, Arizona · Senior · Full-time · Posted Sep 11, 2026
About the job
Characterize and validate PCIe interfaces in next-generation Arm SoCs across operating conditions, debugging issues and improving silicon performance.
What you'll do
- Develop system-level stress workloads and characterization tests for Linux and Bare-Metal SW environments.
- Collaborate with post-silicon validation teams to use test content and characterize silicon at the system level.
- Debug system issues and analyze characterization results.
What they ask for
- Experience in pre- or post-silicon validation and characterization, including understanding silicon power, performance, and PVT behavior.
- Experience with PCIe architecture, including link initialization, training, equalization, and PHY operation.
- Software skills in C/C++, Arm assembly, Python, or scripting languages; experience with voltage/frequency margining and silicon operating limits.
- Experience debugging PCIe, silicon, and system issues using protocol analyzers, scopes, debuggers, or similar tools.
Nice to have
- PCIe PHY characterization, signal integrity, protocol-level debug, or experience with PCIe Gen4, Gen5, Gen6, or related high-speed interfaces.
- PCIe performance and stability characterization, protocol analysis, error handling, link recovery, compliance testing, Python automation, or Arm-based SoCs.
Pay
$161,500-$218,500 per year (base salary)
Tools
Linux, Bare-Metal SW, C/C++, Arm assembly, Python, PCIe
AI focus
The role does not involve AI work. The posting permits AI for application preparation but prohibits its use to complete assigned assessment tasks.
Model-written summary · the original posting is authoritative