Arm
Staff Design Verification Engineer - Network Coherent Interconnect
$198K–$268K
Austin, Texas · Staff · Full-time · Posted Oct 7, 2026
- Experience
- 8+ years of experience in verification/RTL design.
- Education
- Bachelor’s, Master’s, or PhD in Electrical/Computer Engineering or Computer Science.
About the job
Verify Arm’s next-generation NI-700 non-coherent Network-on-Chip interconnect products for configurable systems.
What they ask for
- Bachelor’s, Master’s, or PhD in Electrical/Computer Engineering or Computer Science
- 8+ years of experience in verification/RTL design
- Multiprocessing microarchitecture experience, including cache coherence and bus protocols such as AMBA5 CHI, AMBA4 ACE, or AXI
- Experience specifying, creating, and debugging System Verilog/UVM constrained-random testbenches; software engineering skills in object-oriented programming, data structures, and algorithms; scripting with Python or Perl
Nice to have
- Experience in Formal Verification testbenches
Pay
$198,100-$268,000 per year (base salary)
Tools
AMBA5 CHI, AMBA4 ACE, AXI, System Verilog, UVM, Python, Perl
Model-written summary · the original posting is authoritative