Arm
Staff Package Layout Engineer
$209K–$283K
San Jose, California · Staff · Full-time · Posted Sep 10, 2026
- Experience
- 5-7+ years of recent Cadence APD & Allegro toolset experience.
- Education
- Electrical Engineering degree or equivalent work experience.
About the job
Designs, verifies, and optimizes advanced system-in-package layouts for next-generation SoCs, coordinating with internal teams and external vendors.
What you'll do
- Assist with package design definition, design, and verification; develop layouts following DFM, DFA, signal-integrity, and power-delivery practices.
- Conduct feasibility studies and optimize bump maps, ball patterns, routing, stack-ups, reference planes, and power distribution.
- Guide team members, coordinate with vendors, and help improve layout methodologies and standardization.
What they ask for
- Electrical Engineering degree or equivalent work experience.
- Experience with 2.5D and 3D package systems and their SI/PI requirements.
- 5-7+ years of recent experience using Cadence APD & Allegro toolsets.
- Ability to support department-wide standardization and efficiency.
Nice to have
- Familiarity with EDA vendor collaboration, tool evaluations, and issue resolution.
- Programming experience in Python, SKILL, or TCL.
Pay
$209,100-$282,900 per year (base salary; USD)
Tools
Cadence APD, Allegro, Python, SKILL, TCL
Model-written summary · the original posting is authoritative