Drimva

Arm

Staff STA Engineer

$198K–$268K

Austin, Texas · Staff · Full-time · Posted Jul 27, 2026

Experience
6+ years in timing convergence.
Education
Master’s or equivalent experience in Electrical Engineering (nice to have).

About the job

Owns timing closure and constraints for complex chip and block designs, collaborating across teams to resolve timing issues and implement engineering changes.

What you'll do

  • Lead full-chip and block-level timing closure throughout the project cycle and handle functional and test-mode constraints.
  • Collaborate with engineering teams to resolve timing issues and coordinate block- and top-level ECOs.
  • Develop constraints and support timing closure for multi-power-domain designs on advanced process nodes.

What they ask for

  • 6+ years of timing convergence experience.
  • Experience with industry-standard STA tools and methodologies, timing corners and modes, DFT, process variation, and signal integrity.
  • Experience with timing closure for multi-power-domain designs and constraints development on 5nm or 3nm technologies.
  • Strong automation skills using Pert/Tcl/Python and experience collaborating with silicon engineering groups and EDA vendors.

Nice to have

  • Master’s or equivalent experience in Electrical Engineering.
  • Coding in Perl, Python, TCL, or an equivalent language; familiarity with synthesis, logic equivalence, DFT, CLP, and backend methodologies and tools.

Pay

$198,100-$268,000 per year (base salary)

Tools

STA, Pert, Tcl, Python, Perl, DFT, CLP

AI focus

No AI work is specified; the posting states AI may be used for application preparation but not to complete assessment tasks.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)