Astera Labs
Analog Mixed Signal Engineer Intern
San Jose, CA or Irvine, CA +1 · Internship · Posted Oct 9, 2026
- Location
- San Jose, CA or Irvine, CA
California - Experience
- No number of years specified.
- Education
- Pursuing a Master’s or PhD degree in EE.
About the job
Design and verify analog and mixed-signal IC circuits and clocking blocks for advanced-node CMOS connectivity products.
What you'll do
- Develop and verify circuits including PLLs, DLLs, ADCs, regulators, amplifiers, TX/RX, and CDRs to meet performance targets.
- Work on analog and clocking blocks for connectivity applications using tools such as Spectre and MATLAB.
What they ask for
- Pursuing a Master’s or PhD degree in EE.
- Hands-on experience designing high-speed mixed-signal circuits and advanced-node CMOS design and tapeout.
- Strong fundamentals in transistor-level design, feedback and stability analysis, and noise and jitter analysis.
- Strong experience with lab chip bring-up and debugging.
Nice to have
- Knowledge of TIA design and drivers for optical applications; RFIC design experience is also highly desirable.
- Familiarity with Python, Matlab, or C; PCB design; Verilog RTL or DSP concepts; optical transceivers; or ESD and IC packaging.
Pay
$47-$70/hour USD (hourly pay); $500-per-week USD (housing/relocation stipend)
Tools
Spectre, MATLAB, Python, Matlab, C, Verilog RTL
Model-written summary · the original posting is authoritative