Astera Labs
Analog/Mixed Signal System Test Engineer Intern
San Jose, CA +1 · Internship · Posted Oct 12, 2026
- Location
- San Jose, CA
California - Experience
- No number of years stated; hands-on mixed-signal circuit experience is required.
- Education
- Pursuing a Master’s or PhD degree in EE is preferred.
About the job
Verifies analog and mixed-signal circuits for advanced CMOS products used in electrical and optical interconnects, checking that they meet performance targets.
What you'll do
- Verify circuits including PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs against performance targets.
- Bring up chips in the lab and automate testing, data collection, analysis, and debugging.
- Present and document technical work and collaborate with the team.
What they ask for
- Hands-on experience designing or validating high-speed mixed-signal circuits is required.
- Strong experience with lab chip bring-up, automation, data collection, data analysis, and debugging.
- Experience with lab equipment such as UXR, DCA, VNA, PNA, or BERT.
- Strong programming or scripting ability in Python, Matlab, or C.
Nice to have
- Design and tapeout experience in advanced CMOS nodes (e.g., 20nm or newer); PCB design; familiarity with Verilog RTL or DSP concepts.
- Knowledge of optical transceivers, TIA design, and drivers for optical applications.
Pay
$38/hour to $46/hour (hourly rate); $500-per-week (housing/relocation stipend)
Tools
CMOS, PLL, DLL, ADC/DAC, Python, Matlab, C, Verilog RTL
Model-written summary · the original posting is authoritative